Product Summary

The M12L16161A-5TG is a 512K x 16Bit x 2banks synchronous dram. The M12L16161A-5TG is a 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with high performance CMOS technology. Synchronous design of the M12L16161A-5TG allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies of the M12L16161A-5TG allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

Parametrics

M12L16161A-5TG absolute maximum ratings: (1)Voltage on any pin relative to VSS VIN,VOUT: -1.0 ~ 4.6 V; (2)Voltage on VDD supply relative to VSS VDD,VDDQ: -1.0 ~ 4.6 V; (3)Storage temperature TSTG: -55 ~ + 150 ℃; (4)Power dissipation PD: 0.7 W; (5)Short circuit current IOS: 50 MA.

Features

M12L16161A-5TG features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Dual banks operation; (4)MRS cycle with address key programs: CAS Latency (2 & 3 ); Burst Length (1, 2, 4, 8 & full page); Burst Type (Sequential & Interleave); (5)All inputs are sampled at the positive going edge of the system clock; (6)Burst Read Single-bit Write operation; (7)DQM for masking; (8)Auto & self refresh; (9)32ms refresh period (2K cycle).

Diagrams

M12L16161A-5T pin connection

M12L128168A
M12L128168A

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Negotiable 
M12L128168A-5BIG
M12L128168A-5BIG

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Negotiable 
M12L128168A-5TIG
M12L128168A-5TIG

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Negotiable 
M12L128168A-6BIG
M12L128168A-6BIG

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Negotiable 
M12L128168A-6TG
M12L128168A-6TG

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Data Sheet

Negotiable 
M12L128168A-6TIG
M12L128168A-6TIG

Other


Data Sheet

Negotiable